CMU-CS-85-145 Computer Science Department School of Computer Science, Carnegie Mellon University
Validation of a Fault-Tolerant Multiprocessor: Baseline Experiments and Workload Implementation CMU-CS-85-145 Frank Feather, Daniel Siewiorek, Zary Segall July 1985 oot Department of Electrical and Computer Engineering and Department of Computer Science In the future, aircraft must employ highly reliable multiprocessors in order to achieve flight safety. Such computers must be experimentally validated before they are deployed. This project outlines a methodology for validating reliable multiprocessors. The methodology begins with baseline experiments, which test single phenomenon. As experiments progress, tools for performance testing are developed. This methodology is used, in part, on the Fault-Tolerant Multiprocessor FTMP at NASA-Langley's AIRLAB facility. Experiments were designed to evaluate the fault-free performance of the system.
This report presents the results of interrupt baseline experiments performed on FTMP. Interrupt causing exception conditions were tested, and several were found to have unimplemented interrupt handling software while one had an unimplemented interrupt vector. A synthetic workload model for realtime multiprocessors is then developed as an application level performance analysis tool. Details of the workload implementation and calibration are presented.
Both the experimental methodology and the synthetic workload model are general enough to be applicable to reliable multiprocessors beside FTMP.
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